Senior Staff Engineer

5 days ago

Bristol, Bristol, United Kingdom Semtech Full time

Job Summary:

We are seeking a highly skilled Senior Staff Engineer, Digital IC Design to join our UK Digital R&D team at Semtech Corporation. As a key member of our team, you will work on the next generation of mixed-signal optical devices for our Signal Integrity Products (SIP) team.

Key Responsibilities:

  • Collaborate with the product definition team to develop high-level requirements for products.
  • Translate high-level design requirements or architecture documents into detailed design specifications.
  • Design and simulate RTL (Register Transfer Level) and block/top-level designs, and create timing constraints.
  • Develop thorough verification plans and fully verify designs through simulation.
  • Model complex analogue functions using behavioural modelling.
  • Perform synthesis, place and route, DFT insertion, timing closure, and ATPG (Automatic Test Pattern Generation) for SCAN test.
  • Work closely with layout engineers to ensure design is LVS (Layout vs. Schematic), DRC (Design Rule Check), and timing clean.
  • Collaborate with other team members to ensure the design meets all customer requirements under tight timescales.
  • Contribute to the design verification environment definition, implementation, and debugging as required.
  • Mentor other team members.

Requirements:

  • BSc/MSc/BEng/MEng/PhD in a related field.
  • 8+ years of related experience.
  • Expertise in digital IC design flow from specification to tape-out.
  • Proficiency in Verilog/VHDL for design and simulation/verification.
  • Experience with energy-efficient low-power logic design.
  • Knowledge of scripting languages such as Perl, TCL, etc.
  • Expertise with digital design tools for synthesis, place and route, timing closure, equivalency checking, DFT insertion, and ECO from Synopsys or Cadence.
  • Proven track record with multiple designs in mass production.

Desired Qualifications:

  • Experience with verification using high-abstraction languages such as SystemVerilog, C, Vera.
  • Experience with mixed-signal analogue/digital verification.
  • FPGA design experience.
  • Prior experience in designs using advanced CMOS process technologies from 180nm down to 28nm and below.

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