VLSI Verification Engineer/Lead
4 weeks ago
We are seeking talented VLSI Verification Engineers and Leads to contribute to the success of our cutting-edge technologies. The ideal candidates will possess strong expertise in socket-to-socket verification processes, particularly with AXI, Chip2Chip Multilink (CML), and CHI protocols.
Key Responsibilities (Engineer)- Develop test benches and detailed test plans for Socket2Socket verification.
- Utilize System Verilog and UVM to create, simulate, and debug test cases.
- Perform coverage analysis to ensure thorough verification of designs.
- Collaborate with design and cross-functional teams to troubleshoot and resolve issues.
- Lead the verification process for Socket2Socket projects, ensuring timely and high-quality deliverables.
- Mentor and guide a team of verification engineers, fostering professional development and ensuring adherence to best practices.
- Define and manage test strategies, simulation plans, and coverage analysis to achieve comprehensive verification.
- Act as the primary decision-maker for verification sign-off, collaborating closely with management and design teams.
- Expertise in System Verilog, UVM, and coverage-driven verification methodologies.
- Strong experience in test planning, test bench development, simulation, and debugging.
- For Lead: Proven leadership, team management, and decision-making capabilities.
- In-depth understanding of AXI, Chip2Chip Multilink (CML), and CHI protocols.
- For Engineer: 5+ years of experience in socket-to-socket verification and hardware validation.
- For Lead: 10+ years of experience in socket-to-socket verification, with a demonstrated ability to lead teams and manage complex projects.
- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
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