VLSI Verification Engineer/Lead for Ethernet Protocols
4 hours ago
Job Overview:
HCLTech is seeking experienced Ethernet Verification Engineers and Leads to drive verification projects and ensure high-quality deliverables. The ideal candidates will have strong expertise in System Verilog, UVM, and coverage-driven verification.
Key Responsibilities (Engineer):
- Develop test benches and detailed test plans for Ethernet verification.
- Use System Verilog and UVM to create, simulate, and debug test cases.
- Perform coverage analysis to ensure full verification coverage.
- Collaborate with design and cross-functional teams to resolve issues.
Key Responsibilities (Lead):
- Oversee the entire verification process for Ethernet-related projects.
- Lead and mentor the verification team, ensuring high-quality deliverables.
- Drive the development of advanced test plans, simulation strategies, and coverage analysis.
- Coordinate with design and management teams for verification sign-off and timeline management.
Key Skills:
- Proficiency in System Verilog, UVM, and coverage-driven verification.
- Strong experience in test planning, test bench development, debugging, and simulation.
- For Lead: Strong leadership, team management, and decision-making abilities.
Domain Knowledge:
- Solid understanding of Ethernet protocols and AXI (Advanced eXtensible Interface).
Qualifications:
- For Engineer: 5+ years of experience in Ethernet verification and hardware validation.
- For Lead: 10+ years of experience in Ethernet verification, with a proven ability to lead teams and projects.
- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
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