Principal Verification Engineer

5 hours ago

Bristol, Bristol, United Kingdom Platform Recruitment Full time £90,000 - £120,000 per year

My client is a globally recognised semiconductor company developing a new product family based on RISC-V architecture, marking a significant evolution in their technology roadmap.

They're seeking skilled verification engineers to support the increased demand for functional verification across a variety of complex IPs. This growth reflects both long-term investment in R&D and a strategic shift in architecture, making it an exciting time to join.

Principal Verification Engineer

Responsibilities:

  • Develop and maintain SystemVerilog UVM testbenches for complex IPs.
  • Lead the creation of new UVM verification components and contribute to testbench architecture
  • Debug test failures and define functional coverage models to ensure sign-off quality.
  • Work closely with designers and contribute to verification strategy during design and concept phases.
  • Improve verification efficiency and ensure compliance with functional safety and quality standards.

Requirements:

  • Minimum 5 years of IP-level verification experience using SystemVerilog UVM.
  • Strong understanding of UVM methodology, SVAs, and verification metrics.
  • Ability to interpret complex design specifications and create robust verification environments.
  • Proficiency in industry-standard EDA tools and scripting languages.
  • Excellent communication skills and a methodical, detail-focused approach.

Apply to learn more

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