High Performance C++ RTL Engineer for Trading Systems
1 week ago
We are seeking a highly skilled C++ RTL Engineer to join our team in London. As an FPGA Engineer, you will be responsible for designing and developing ultra-low latency market access solutions using C++ software engineering and RTL design.
Key Responsibilities- Design, build, and support ultra-low latency market access solutions.
- Develop software driving the hardware design to its optimum performance.
- Continually seek improvement of the efficiency of the hardware development workflow.
- Integrate hardware designs into the larger software stack.
- Problem solve and collaborate with an experienced team on groundbreaking technology projects.
- A 2.1 or above at BSc in Electrical Engineering or Computer Science.
- Experience with FPGA vendor tools such as Vivado / Quartus.
- Strong knowledge of Linux OS and an understanding of basic network protocols such as TCP/IP and Ethernet.
- Background with C++ software engineering and RTL design.
- Interest in using software engineering methodologies to improve the efficiency of the hardware development workflow.
- Collaborative with great communication skills.
The successful candidate can expect a salary up to £175,000 per year, plus a range of benefits including bonuses of multiple base salary, 5 weeks paid holiday plus Bank Holidays, pension, medical insurance, dental insurance, life assurance, income protection schemes, reimbursement of wellness expenses, and a charity donation matching program.
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