Power Intent Engineer
4 weeks ago
Arm Limited is seeking a skilled Power Intent Engineer to optimize the power and cohesiveness of our solutions. In this role, you will work within the implementation team to develop and verify power intent for system level designs and SoCs, delivering accurate results across a range of technology nodes.
You will collaborate with our chip design partners to support their physical implementation success, develop and deploy new methodologies to improve implementation efficiency and results, and convert ground-breaking R&D concepts into real solutions.
The ideal candidate will have a strong understanding of power management techniques and low-power design methodologies, proficiency in writing and verifying UPF, and experience with low power design techniques, such as clock and power gating, voltage/frequency scaling, retention.
Additionally, you will have the ability to analyze problems, reason logically about solutions, and chart the appropriate course to take, as well as experience in architecting and embracing new silicon implementation techniques and methodologies.
As a Power Intent Engineer at Arm Limited, you will have the opportunity to utilize your engineering skills to underpin the power efficiency of many designs, alongside mentoring colleagues to gain a deeper understanding.
You will also have the chance to bring your ideas to a wide group of our leading authorities, build your technical leadership and influencing skills, and work towards becoming an established and recognized authority within the existing team.
Responsibilities:- Develop and verify power intent for system level designs and SoCs
- Deliver accurate results across a range of technology nodes
- Collaborate with chip design partners to support physical implementation success
- Develop and deploy new methodologies to improve implementation efficiency and results
- Convert R&D concepts into real solutions
- Strong understanding of power management techniques and low-power design methodologies
- Proficiency in writing and verifying UPF
- Experience with low power design techniques, such as clock and power gating, voltage/frequency scaling, retention
- Ability to analyze problems and reason logically about solutions
- Experience in architecting and embracing new silicon implementation techniques and methodologies
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