Leading Edge RTL Designer
3 days ago
Estimated Salary: $110,000 - $140,000 per year
About the Position
We are seeking a talented Leading Edge RTL Designer to join our team. As a key member, you will be responsible for designing and implementing RTL code for complex SoC designs, collaborating with cross-functional teams to ensure successful project delivery.
Key Responsibilities:
- Design and implement RTL code for complex SoC designs using Verilog and/or SystemVerilog.
- Collaborate with verification teams to review test plans and debug design issues.
- Work closely with performance and power analysis teams to evaluate and improve system performance and power.
- Mentor junior engineers and support their growth and development.
- Balance opportunities such as working with Project Management on activities, plans, and schedules.
Requirements:
- Experience in RTL design for complex SoC development using Verilog and/or SystemVerilog.
- Expertise in static design checks, synthesis, timing analysis, power management techniques, and power and clock domain crossing.
- Familiarity with all stages of design, from initial concept to documentation and support.
- Ability to produce clear and concise specifications and documentation describing complex designs.
- Knowledge of shell programming/scripting (e.g., Tcl, Perl, Python) and technical team leadership/mentoring/coaching experience.
Benefits:
As a Leading Edge RTL Designer at ARM, you will have the opportunity to work on cutting-edge projects, collaborate with talented colleagues, and develop your skills and expertise in silicon design and architecture.
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