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SoC Verification Engineer

2 months ago

London, Greater London, United Kingdom microTECH Global Ltd Full time
Job Summary

We are seeking a highly skilled SoC Verification Engineer to join our team at microTECH Global Ltd. As a key member of our engineering team, you will be responsible for deploying verification methodologies, developing testbenches, and analyzing coverage data to ensure the highest quality of our products.

Key Responsibilities
  1. Verification Methodologies: Deploy industry-standard verification methodologies such as UVM and Formal Verification to ensure the accuracy and reliability of our products.
  2. Testbench Development: Develop and maintain testbenches and verification components, including UVCs, C models, and Vertical/Horizontal reusable Verification Environments.
  3. Test Plan Development: Collaborate with design and systems engineers to develop test plans based on design documents and ensure comprehensive coverage.
  4. Assertion Development: Write and debug SystemVerilog assertions to ensure the correctness of our products.
  5. Coverage Analysis: Analyze coverage data and work with design teams to address coverage holes and improve overall product quality.
  6. Regression Framework Development: Develop and maintain a framework for running regressions and improve team efficiency.
  7. Power-Aware Simulations: Run and debug power-aware simulations using UPF and ensure the power efficiency of our products.
  8. Regression Failure Debugging: Collaborate with design and systems teams to debug regression failures and ensure the highest quality of our products.
  9. Automation and Documentation: Develop Python/Perl automation scripts to improve workflows and team efficiency, and maintain accurate documentation of our products.
Candidate Requirements
  1. SoC Verification Experience: Proven experience in design and verification of SoCs and SoC methodologies, including industry-standard tools and technologies.
  2. Testbench Development: Proficient in developing unit and subsystem level testbenches using SV/UVM methodology.
  3. Constrained Random and Metrics-Driven Verification: Experienced in constrained random and metrics-driven verification techniques.
  4. C Model Integration and Scoreboarding: Experienced with C model integration and scoreboarding.
  5. FW Code Integration Verification: Experienced with FW code integration verification.
  6. AMBA Protocols and BUS Interconnect Verification: Experienced with AMBA protocols and BUS interconnect functional and formal verification, including coverage closure.
  7. Power-Aware Verification and Clock Domain Crossing Verification: Experienced with power-aware verification and clock domain crossing verification.
  8. Debugging Test Failures: Experienced with debugging test failures.
  9. Verification Planning and Coverage Analysis: Strong knowledge of verification planning, coverage analysis, pseudo and constrained random techniques, assertion-based and formal verification techniques with System Verilog.
  10. Programming Languages: Experienced with Verilog, C/C++, System C, TCL/Perl/shell-scripting.
  11. Analytical Skills: Strong analytical skills and ability to work in a dynamic and fast-paced team environment.