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Senior Staff Validation Engineer
2 months ago
Arm's Systems Development team is responsible for creating subsystems and SoC designs for various application segments, utilizing the latest IP products from Arm and other vendors. We are seeking a skilled SoC Verification Engineer to join our team. This role requires expertise in verifying and testing sophisticated IP such as CPU/GPU/DSP processors with memory controllers and interconnect fabrics. The successful candidate will ensure that these products work effectively with each other and the software, enabling our partners to produce outstanding systems.
Key Responsibilities:- Develop test plans, define test methodologies, and complete functional verification to the required quality levels and schedules.
- Collaborate with project management and leads on planning tasks, setting schedules, and quality checkpoints.
- Work with engineers from other teams, including architecture, design, implementation, modeling, performance analysis, silicon validation, FPGA, and board development.
- Staff Engineers are also encouraged to mentor junior members.
- Experience with embedded C/C++ based SoC verification environments.
- Knowledge of assembly language (preferably ARM), C/C++, and/or hardware verification languages such as SystemVerilog, shell programming/scripting (e.g. Tcl, Perl, Python, etc.).
- Experience with one or more of various verification methodologies – UVM/OVM, formal, low power, emulation.
- Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support.
- Practical experience of verifying on processor-based system designs.
- Technical team leadership, mentoring, or coaching experience.
- Understanding of the fundamentals of Arm system architectures.
- Power-aware and Clock Domain Crossing implementation.
- Experience in embedded operating systems, device drivers, microprocessor, and embedded system hardware architectures.
- Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet.
- Development and deployment of large SoCs on emulation platforms.
We provide a competitive reward package, including healthcare and wellness support. Other benefits include a contributory pension and 25 days annual leave (with option to buy an additional 5 days per year).
