Expert Digital Design Engineer for Power Management

2 weeks ago

Edinburgh, Edinburgh, United Kingdom Renesas Electronics Full time

About Renesas Electronics

Renesas Electronics Corporation is a leading global provider of microcontrollers and semiconductor solutions, empowering a safer, smarter, and more sustainable future. We combine expertise in embedded processing, analog, power, and connectivity to deliver complete semiconductor solutions that accelerate time to market for automotive, industrial, infrastructure, and IoT applications.

Job Purpose & Dimensions

We are seeking a highly skilled Staff Digital Design Engineer to join our dynamic data conversion & power management team. You will play a crucial role in architecting, designing, and integrating low-power digital circuits for mixed-signal power management products using advanced process nodes.

Principal Accountabilities

  • Lead the development of state-of-the-art digital design processes to ensure projects meet budget, schedule, and deliverable goals.
  • Design robust RTL (Register Transfer Level) that adheres to timing, area, power, and industry standards specifications.
  • Integrate designs at both the top level and block levels, conducting comprehensive simulations.
  • Collaborate closely with the Physical Design team to ensure layout meets timing, area, and power requirements.
  • Contribute to the development of a robust DFT (Design for Testability) strategy and implementation, including review and support of test case development.
  • Assist in top-level test bench debugging and execute both RTL and gate-level simulations.
  • Work closely with analog and digital verification engineers to develop complex test scenarios for pre-silicon verification.
  • Support the analog team by developing AMS, SystemVerilog, or Verilog-real behavioral models.
  • Prepare detailed block and chip level design documents and collateral.
  • Lead and participate in critical design reviews and ensure completion of all necessary checklists.
  • Document device errata, develop workaround solutions, and implement engineering changes as required.

Qualifications

  • 10+ years of experience in digital design within wireless handheld, data conversion, or power management domains.
  • Bachelor's or Master's degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related field.
  • Proficiency in Verilog/SystemVerilog RTL for digital CMOS circuit design.
  • Strong understanding of ASIC design methodology and industry-standard protocols (e.g., AMBA, I2C).
  • Experience with Linting, CDC & RDC tools, STA (Static Timing Analysis), and timing closure techniques.
  • Expertise in low-power design methodologies, including clock and power gating (UPF).
  • Excellent communication and collaboration skills.

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