Principal Verification Engineer

1 week ago

Edinburgh, Edinburgh, United Kingdom Renesas Electronics Full time
Job Description

Job Purpose:

The primary objective of this role is to ensure the compliance of digital and mixed signal designs with specifications through the application of advanced verification methodologies and concepts. This involves the development, deployment, and improvement of cutting-edge verification strategies.

Key Responsibilities:

  • Develop and maintain verification plans, feature extraction, and verification test case and checker development
  • Create efficient and reusable state-of-the-art verification environments and testbench structures
  • Develop verification strategies for digital and mixed signal IPs and implement the verification IP following object-oriented programming principles and methodologies, including UVM
  • Participate in review meetings with design and verification engineers
  • Lead digital verification of mixed signal ICs or sub-systems
  • Collaborate with the Analog Mixed Signal (AMS) verification and analog design team
  • Mentor junior engineers in the team

Performance Metrics:

  • Deliver verification work within agreed time scales as set by program schedule for all assigned tasks
  • Document and log all verification work
  • Implement verification strategy and concept in an early phase of the project
  • Ensure specification compliance by having required verification metrics in place
  • Verify that verification concept and approaches adhere to corporate rules and guidelines

Requirements:

  • 5-10 years of experience in advanced verification methodologies, owning the verification of complex digital and mixed signal designs
  • SystemVerilog for verification using advanced verification methodologies (preferably OVM/UVM or similar such as Specman-e, SystemC, etc.)
  • Assertion-based verification and Formal verification
  • Expert in constrained random verification and metric-driven verification
  • Expert in simulation and regressions tools e.g. Cadence Incisive, vManager, IMC
  • Familiar with either Verilog or VHDL RTL coding and ASIC design methodology
  • Familiar with behavioral modeling of analog blocks

Personal Qualities:

  • Concise and proactive communication skills within a multi-site and multi-cultural environment
  • Ability to persuade and influence others based on technical facts
  • Takes responsibility for solutions and makes them happen, self-motivated
  • Looks for continuous improvement in own and Dialog work practices

Education:

  • Degree in electrical engineering, electronics, computer engineering, computer science, or equivalent

Reporting Structure:

  • Reports to: Digital Group Manager / Team Lead
  • Direct reports: none

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