design verification engineer
7 days ago
JD details:
Design Verification(10 yrs+)
- The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/Subsystems
- Create System Verilog / UVM verification environment.
- Develop tests to meet functional coverage and code coverage requirements defined for the project, based on analysis of coverage gaps.
- Run regressions, debug test failures and file bug report as needed.
- Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain)
- Provide verification report as needed to show all implemented tests passing on the RTL.
- Experienced in working with LPDDR memory controller integration & verification
- Expertise in AXI, APB & CHI protocol are required.
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