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Design Verification Engineer
2 months ago
Responsibilities:
Strong verification experience with knowledge of SystemVerilog, UVM
System verification (C based) experience is a must.
Good knowledge of testplan creation and tracking.
Low-level programming experience including C and Assembler.
Experience with full verification flow including coverage closure.
Experience with ARM-based designs and/or ARM System Architectures
AXI, CHI protocol knowledge.
About us:
We are Semiconductors, and a Design and Test Engineering Service.
A company providing End to End Solutions from Product Engineering, Software, Hardware,
Wireless, Automotive and Embedded Solutions.
We offer a unique combination of pre-silicon and post-silicon expertise to provide an
efficient turnkey solution for silicon bring-up, spec to the product. With 2500+ employees
worldwide,
We provide a one-stop-shop solution with full-fledged hardware and software
capabilities, including its advanced silicon and system testing labs. We offer a Turnkey
ASIC Solution, from design to packaged parts. We have a global presence with office locations in
the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan,
Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.
We offer highly competitive compensation and benefits along with an electric work
environment to scale one’s intellect, skills and growth.