Principal RF/Analog ASIC Design Engineer

3 weeks ago


Cambridge UK, Cambridgeshire, United Kingdom Hanwha Phasor Full time

Principal RF/Analog ASIC Design Engineer


Hanwha-Phasor are recruiting a Principal RF/Analog ASIC Design Engineer to work on the specification, architecture design and circuit design of key circuits and sub-systems of integrated RF transceivers for next generation of satellite communications in various deep sub-micron technologies. The Principal RF/Analog ASIC Design Engineer will be leading full ASIC chip from design all the way to production. The Principal RF/Analog ASIC Design Engineer will offer the very best technical guidance and supervision for more junior ASIC designers.


Technical Responsibilities:

• Responsible for design of a transceiver blocks (currently in Ku band) in BiCMOS, FDSOI

process or other technologies.

• Hands-on block-level design of various blocks such as LNA, Mixer, TIA, Filter, PA,

Opamps, LO and Filters

• Delivering highly competitive RF/Analog blocks with leading edge performance using

innovative architectures and circuit implementations.

• Work closely with the layout team on IP floor-planning, trial layout design, parasitic

extraction and modifications.

• Co-ordinate design activities with other colleagues and possible contractors.

• Collaborate with CAD, process technology, package design and Antenna teams

• Document own work and participate in design reviews

• Provide broad technical expertise and mentor junior team members


Organisational Responsibilities:

• Ongoing development of core competencies & technical skills

• Receptive and agile to the project needs.

• Good estimation of timescales for projects & sub tasks

• Follow good engineering practices including processes, documentation, tools &

automation.

• Identify risks, flag issues in a timely manner so project milestones remain on schedule.

Qualifications & Skills:


Essential:

• An Engineering degree in a relevant discipline

• Minimum of 12 years experience in RF, Analog and Mixed-Signal IC design (preferably

up to 25GHz operating frequencies)

• Excellent understanding of state-of-the-art RF CMOS circuit design and transceiver

architectures

• Experience on EM modelling tools such as RFPro or EMX

• Experience of designing high performance Analog/RF circuits in deep sub-micron

technology as well as a strong analytical approach with a clear track record of success

and delivery

• Cadence Virtuoso Design Framework Experience

• Ability to work and interact with engineering teams across multiple disciplines during

ASIC project stream development

• Great communication skills and able to take responsibility for complex circuit and

system designs and delivery to tight timescales

• Experience on Layout design and strategy overview


Desirable:

• Experience on circuit design on FDSOI, and BICMOS process nodes for RF, Analogue

and Mixed-Signal IPs.

• Experience on mmw RF IC design

• Experience on LNA design and RF PA

• Understanding of Radio systems, gain and noise budgeting, phase noise and

intermodulation mechanisms

• Experience on ESD design and strategy overview

• Experience on Cadence/Calibre verification tools

• Experience on revision control tools



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