Senior Design Verification Engineer

3 weeks ago


UK, UK, United Kingdom VANRATH Full time

About the Company:

Location: Fully Remote (UK)


Pay range and compensation package:

Rate: £350 - 400 per day (Inside IR35)


About the Role:

As a Senior Verification Engineer, you will deploy advanced verification methodologies like UVM (Universal Verification Methodology) and Formal Verification in a fully remote capacity across the UK. You will be responsible for developing and maintaining testbenches, UVCs (Universal Verification Components), C models, and reusable verification environments for SoC projects. Collaborating with design and systems engineers, you'll develop comprehensive test plans based on design documents, write SystemVerilog assertions, and perform coverage analysis. You'll also build frameworks for regression testing, run power-aware simulations (UPF), and debug regression failures alongside cross-functional teams. Automation is key, and you will use Python/Perl scripting to enhance workflows and team efficiency. Clear documentation for all verification processes and components is required, and you'll assist in cross-team debugging efforts when necessary.


Responsibilities:

  • Experience: 8-12 years in SoC (System-on-Chip) design and verification, with expertise in verification methodologies and industry-standard tools.
  • Verification Expertise: Skilled in developing unit and subsystem-level test benches using SystemVerilog/UVM, with experience in constrained random and metrics-driven verification.
  • C Model Integration & Scoreboarding: Proven experience with integrating C models and scoreboarding for efficient verification.
  • Firmware Code Integration: Familiar with firmware code integration in verification environments.
  • Protocol & Coverage Experience: Expertise in AMBA protocols, bus interconnect functional verification, formal verification, and achieving coverage closure.
  • Power-Aware and CDC Verification: Proficiency in power-aware verification and clock domain crossing (CDC) verification.
  • Debugging Skills: Strong experience in debugging test failures and collaborating with design teams to resolve issues.
  • Technical Proficiency: Hands-on experience with Verilog, C/C++, SystemC, and scripting (TCL, Perl, shell).
  • Soft Skills: Strong analytical, communication, and collaboration skills, with the ability to work in a dynamic, fast-paced, fully remote environment.


Equal Opportunity Statement:

This is a fully remote, UK-based position offering a daily rate. It is a great opportunity for an experienced Verification Engineer to work on leading-edge SoC projects while enjoying the flexibility of a remote working arrangement.



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