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IC DFT Engineer

3 months ago

Cambridge UK, Cambridgeshire, United Kingdom Cambridge Mechatronics Ltd Full time

About CML

Cambridge Mechatronics Limited (CML) is a multi-disciplinary company, developing camera module solutions utilising our cutting-edge shape memory alloy (SMA) technology. Our technology is shipping in top tier flagship smartphones, as well as inside drones, wearable devices, and other consumer products.

We have approximately 700 granted and pending patents based around our platform technology, which allows the control, positioning and movement of smart materials with high precision. CML is proud to rank in the top 25 applicants in terms of yearly UK patent filings, on par with larger technology licensing companies such as Arm, Imagination Technologies and Rolls Royce.

CML’s SMA wire is thinner than the width of a human hair and can be positioned with the accuracy of the wavelength of light. CML is the only company in the world to master and control these materials with such exceptional accuracy.

The work environment at CML is stimulating and exciting, as we are involved throughout the entire product development process from inception through to mass production, which provides a real sense of achievement for our employees.


About You

We are looking for someone who is passionate about cutting-edge technology and is looking to thrive in a collaborative environment.

You will play a crucial role in overseeing and co-ordinating all aspects of integrated circuit (IC) design for testability (DFT) activities.

You will have excellent communication and organisational skills with the ability to proactively assist colleagues and spot areas for improvement.


Design For Testability (DFT) – ATPG / MBIST

  • Responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP tests and Pattern Validation w/wo Timing
  • DFT mode timing Analysis and sign off
  • Responsible for a comprehensive DFT plan and drive the implementation
  • Working with cross functional teams
  • Train and mentor other test engineers
  • Work with extended teams to develop project schedules and execute projects to completion
  • Generating, verifying and debugging HDL and firmware-based test cases for DFT features of Flash-based FPGA
  • Improving, extending, and porting existing DFT circuits and concepts to FPGA
  • Developing test-benches and documenting test plans

Documentation and Communication

  • Create and maintain comprehensive DFT documentation, requirements specifications, and test plans
  • Communicate effectively with cross-functional teams, stakeholders, and management


Technical Expertise

  • Possess in-depth knowledge of analog and digital IC design principles
  • Experience of scan-stitching; and has good knowledge of scan-stitching related concepts..
  • Experience of MBIST/BISR implementation.
  • Has worked on ATPG and is well conversed with the files required to run ATPG.
  • Knowledge / experience with various EDA tools like Tessent ATPG (mentor) is a plus
  • Has worked on Spyglass-Lint.
  • Knowledgeable on TestMAX ATPG and TestMAX DFT
  • Knowledgeable on test automation scripts
  • Knowledgeable on JTAG, I2C, I3C
  • Experience of supporting Spyglass debug and coverage co-relation
  • Knowledgeable in debugging DRC and other scan-related issues
  • Experience of supporting ATPG and debug ATPG issues
  • Experience of supporting MBIST/BISR insertion and debug insertion or verification issues
  • Experience of supporting gate-level simulations


Essential Skills

  • Strong IC design and verification skills and relevant knowledge
  • Knowledge of EDA tools like, Tessent, Cadence Module or TestMax
  • Analytical thinking and attention to detail
  • Proficiency in using computer software and relevant tools
  • Highly skilled individual with many successful tape outs/experience
  • MBIST expert
  • ATPG / scan insertion expert
  • Scan compression, JTAG, OCC
  • Function test generation
  • Very good vector generation and simulation skills
  • Experienced at interacting with external OSAT / test engineers
  • Industry knowledge of ATE test systems like Teradyne or Advantest


Qualifications

  • An undergraduate degree or higher in engineering, physics, or a similar subject

CML Offers

We have roles that you can help define and mould to your skills and ambitions within a multi-disciplinary team. We are happy to accommodate individuals with different skill sets and you will have the opportunity to make an important contribution to a dynamic and fast-growing company with a global reach. Your salary package will be very competitive and dependent upon relevant academic and industrial experience.

  • Competitive salary
  • Travel opportunities
  • Opportunities to work in China
  • Free breakfast cereals, fresh fruit, tea & freshly ground coffee, daily
  • Lunchtime leisure activities (tennis/table tennis/gaming)
  • Cycle to work scheme
  • Regular social and team events
  • Shower facilities
  • Private Health Insurance
  • Life insurance
  • 25 holidays plus public holidays (total of 33 days a year)
  • Training by world leading experts