Senior Physical Design Engineer

1 week ago


Cambridge, United Kingdom IC Resources Full time

Join to apply for the Senior Physical Design Engineer role at IC Resources Our client is an innovative semiconductor company building custom AI processors designed to deliver major improvements in computational efficiency. As they expand their physical design group, they’re looking for a Senior Digital IC Physical Design Engineer who can help drive advanced-node SoCs from early implementation through to tape-out. This is a chance to play a key role in shaping high-performance AI hardware with a genuinely forward‑looking roadmap. As a Senior Physical Design Engineer, you’ll work on complex digital blocks and full‑chip implementations targeting leading‑edge process nodes. You’ll be involved across the full physical design lifecycle, contributing to both methodology and hands‑on execution. What You’ll Be Working On Driving physical implementation from synthesis through final sign‑off for high‑performance AI SoCs Building and refining floorplans, power structures, and partitioning strategies for advanced‑node technologies Handling constraints generation, timing analysis, and closure across multiple corners and conditions Collaborating with RTL, verification, DFT, and architecture teams to iterate design changes and implement ECOs Running physical verification and ensuring clean sign‑off for reliability, timing, power, and manufacturability Supporting flow development and automation using industry‑standard EDA tools and scripting What They’re Looking For Degree in Electrical/Electronic Engineering or a related discipline Strong background in digital backend/physical design with experience driving complex designs through the full implementation flow Proven experience in 5+ successful tapeouts Excellent understanding of P&R, STA, CTS, congestion/power/timing optimisation, and sign‑off methodologies Hands‑on experience with modern EDA toolchains (Cadence, Synopsys, Mentor) and scripting for automation Familiarity with low‑power design practices and the challenges of deep‑submicron or FinFET technologies For more information on this role or others, please contact Jordan Browne at IC Resources for more information. #J-18808-Ljbffr


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