Staff Design Engineer

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > Systems Engineering
General Summary: Job Overview Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and industries.
Qualcomm's Voice and Music Business Unit is a leading player in wireless earbud, headset, and smart speaker market. The business unit develops and delivers hardware, software and applications that bring together the very latest wireless and audio technologies to create industry leading audio voice and music products. You will be joining a successful engineering department whose deliveries can be found in billions of Bluetooth and Voice and Music products worldwide. We offer end-to-end solutions for leading-edge low-power mixed-signal SOCs from feasibility study through to system architecture, digital and analogue design, verification and validation, implementation and layout, embedded software design, ATE test, production, and characterisation.
Based in our Bristol office, the role of the Staff Engineer, Power Systems Engineering is to provide technical leadership and direct contributions for the low power design and implementation of Voice and Music Products. Candidates are expected to own and drive end to end power analysis, architecture and specification including understanding of use-case power requirements, development of power models, definition of key performance metrics, system specification of level optimal power solutions and performing chip and block level power analysis to provide power targets to design teams. You will have frequent interaction with System, HW, FW, SW engineering teams, as well as product marketing, and customer engineering teams.
You will need to be self-driven and motivated with excellent organizational and communication skills, working alongside System and IC architects, Digital and RF Design, Verification and Validation teams and Software teams. You will have demonstrable technical leadership skills and experience on power system design, architecture, implementation, verification and validation, showing a desire for continuous improvement and driving quality in your own work and others. You will be expected to foster a positive working environment geared towards verifying and validating IPs and SoCs.
Key Responsibilities The main responsibility of this role is to define and drive the power management, power modelling and power optimization from architecture to implementation and sign-off for Voice & Music products. Work with architects, designers and product engineers to understand the power requirements and define all power specs, budgets and use cases. Develop power model to provide power data for performance/power/area trade-offs and to enable management/marketing with meaningful product decisions and customer interaction. Understand power implications of how SW uses the chip as well as the usage of the product in the end-solution with external components. Work with architects and designers to determine use-cases for power simulations. Work with design and verification teams to ensure power optimisation techniques are applied correctly without affecting the desired functionality. Work with PMU design team to determine the optimum supply strategy Power measurements, debug and issue resolution Collaborate effectively with other technical staff, mentoring junior members of the team as needed RTL design in System Verilog and expert digital design knowledge. Documentation including micro architecture and programming guides. Cross functional collaboration with Firmware, Systems and Verification teams. Minimum Qualifications: • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
OR
Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
Required Competencies Understanding of ASIC design flows and methodology including RTL, verification, synthesis, STA, formal verification on different process nodes. Design, Integration and Verification of RTL blocks including DSP, SoC and peripheral IP. Experience in Verilog, System Verilog, and RTL simulation, proficiency in programming languages (C/C++) and proficiency in scripting languages (e.g. Python). Experience with industry standard Power Analysis EDA tools such as PTPX/Prime Power/Power Artist etc. Knowledge on low power design fundamentals including UPF/CPF, multi-voltage domains, power gating, dynamic clock and voltage scaling (DCVS), thermal management and on chip power management, and experience in post-silicon validation and debug. Understanding of power impact at architecture, logic design, and circuit levels. Excellent oral and written communication skills as the candidate will interface and collaborate with diverse groups across multiple geographies. Capability to collaborate effectively with other technical staff and share own experience with other engineers. Self-driven and motivated with strong capability to lead initiatives. Excellent organizational, execution and collaboration skills. Excellent debugging and critical thinking skills Proactive, with a can-do attitude who is able to challenge and is open to be challenged on technical views. Attention to details and taking pride in their work. Capability to grow into a lead role for making and driving effective plans and collaborating with cross functional teams. Preferred Skills and Experience Experience in power modelling, hardware power simulation and analysis flow. Experience in design and analysis of power management IPs with a solid understanding of clock, reset, and power sequencing interactions. Knowledge of basic DSP and modem architectures. Understanding and specifying requirements. Ability to automate and improve process through scripting in Python, Perl. Understanding of effective HW/SW architecture split. Broad understanding of SW design requirements and limitations. Relevant work experience, including participation in high-volume silicon development programs. Silicon power measurement experience is a plus. Experience and knowledge across both pre and post-silicon validation Capability to build solid understanding of Bluetooth, Wi-Fi and other connectivity standards and develop detailed knowledge of design. Proactive, creative, curious, motivated to learn and contribute with good collaboration skills. *References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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