Design Verification Engineer
3 weeks ago
Job Description
Design Verification Engineer
Location: Cambridge, UK
Availability : Within 4 weeks
Experience : 7+ years
Responsibilities:
- Strong verification experience with knowledge of SystemVerilog, UVM
- System verification (C based) experience is a must.
- Good knowledge of testplan creation and tracking.
- Low-level programming experience including C and Assembler.
- Experience with full verification flow including coverage closure.
- Experience with ARM-based designs and/or ARM System Architectures
- AXI, CHI protocol knowledge.
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