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Highly Skilled SystemVerilog Tester
1 month ago
We are seeking a highly skilled and experienced Senior Staff Validation Engineer to join our team at Arm Limited. As a Senior Staff Validation Engineer, you will play a key role in ensuring the successful delivery of our next-generation system-on-chip (SoC) designs.
About UsAt Arm Limited, we are passionate about building amazing products that bring value to our customers' lives. We strive to create new technologies that empower innovators around the world to build smarter, faster, and more efficient devices. Our goal is to stay ahead of the curve and deliver cutting-edge solutions that meet the evolving needs of the electronics industry.
- You will have expertise in digital hardware design, specifically in SystemVerilog and Verilog HDL.
- Proven experience in SoC verification using UVM and embedded low-level programming experience including C/C++ and assembly language (preferably ARM).
- Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support.
- Porting peripheral driver software.
- Development and deployment of large SoCs on emulation platforms.
- Automation experience with shell programming/scripting (e.g., Tcl, Perl, Python etc.).
Key responsibilities of this role include:
- Writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues.
- Working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
- Collaborating with engineers from other teams including architecture, design, implementation, modeling, performance analysis, silicon validation, FPGA, and board development.
Estimated Salary: £100,000 - £140,000 per annum, depending on experience. This salary range is based on national averages and may vary depending on location.