Design Verification Specialist
22 hours ago
**Job Title:** Design Verification Specialist
We are seeking a highly skilled Design Verification Specialist to join our team at Apple Inc. in Munich, Germany.
**Estimated Salary:** €80,000 - €110,000 per year
As a Design Verification Specialist, you will be responsible for enabling bug-free first silicon for mixed-signal designs. Your key responsibilities will include:
- Construction of verification environments using SystemVerilog UVM library
- Coding of test scenarios and assertions
- Collaboration with Analog and Digital Design engineers
You will work closely with our team to deliver tests for design and test engineering teams and perform gate-level verification (power and timing). Additionally, you will support lab bring-up activities.
The AMS DV team at Apple focuses on research and innovations to improve verification techniques and tools for mixed-signal systems. You will contribute to this effort by developing self-checking verification environments for multi-layer systems.
**Required Skills and Qualifications:*
- Knowledge of System Verilog test-bench language and UVM (Universal Verification Methodology)
- Hands-on experience with constrained random verification environments
- Basic design background in support of verification results analysis
- Knowledge of Object Oriented Programming (OOP)
- Proficiency in English language is required
**Preferred Qualifications:*
- Master’s degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent
- Hands-on experience with Assertion Based Verification
- Familiarity with system design using C++, Python or Verilog
- Familiarity with FPGA emulation platforms
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