Signal Processing Design Lead
2 days ago
Job Summary
The Bureau Engineer will develop I/O libraries, including design, simulation, characterization, and validation of I/O pad libraries. This role also involves defining ESD methodologies, specifying chip and IP-level ESD requirements, and designing ESD protection devices and circuits to meet design needs.
Main Responsibilities- Design, simulate, and optimize I/O circuits and ESD structures
- Characterize and model I/O libraries for mixed-signal design flows
- Release and maintain I/O libraries and models
- Understand ESD and latch-up requirements
- Drive ESD sign-off methodology for chip & block-level projects
- Lead technical efforts, integrating ESD-Latch up-IO methodologies and gaining buy-in from business units
- MSc EE and relevant experience
- Holistic view of ESD/EOS protection for mixed-signal CMOS circuits
- Strong fundamentals in ESD circuit design, layout, and testing
- Relevant experience in IO design, including CMOS circuit design, ESD, and latch-up requirements, physical verification, and characterization
- Chip-level ESD signoff experience
- Understanding of layout and ability to guide layout engineers
- Proficiency with Cadence schematic capture, layout, and simulation tools
- Ability to work independently and lead or be part of a technical team
- Effective oral and written communication
$120,000 - $150,000 per year, based on qualifications and experience.
This role is located in Edinburgh, UK, with a hybrid remote schedule. You must be based within commutable distance of the work location or willing to relocate prior to beginning employment.
We value diversity and promote an inclusive culture where different perspectives are respected and valued.
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