Senior Design Verification Engineer
23 hours ago
Key Responsibilities:
As a Senior Design Verification Engineer at ALOIS Solutions, you will be responsible for designing and implementing verification environments for complex SoC designs. Your tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, and completing functional verification and coverage for all agreed design blocks.
Key Skills:
- Expertise in System Verilog and UVM verification environments
- Experience in working with LPDDR memory controller integration and verification
- Strong understanding of AXI, APB, and CHI protocols
Requirements:
- 10+ years of experience in design verification
- Strong programming skills in C and System Verilog
- Excellent problem-solving skills and attention to detail
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