Senior Verification Engineer Lead
4 weeks ago
Job Description:
Verification Lead (ASIC/FPGA)
Technical Leadership Role
The Senior Verification Engineer Lead is responsible for technical coordination of the Verification team to ensure a design complies with System Requirements and Design Specification.
This company is making huge changes in the way that the internet is accessible on our mobile phones. They are designing chips to put into satellites to give complete global coverage wherever you are in the world.
Duties and Responsibilities:
- Working closely with System Definition and FPGA/IC Design teams to ensure verification compliant documentation and early identification of specification holes/ambiguities
- Technical leadership, planning and review of the Verification team activities to meet the group goals
- Create advanced verification flows to achieve the highest verification quality, productivity and time-to-market metrics
- Managing and reviewing Verification Compliance of 3rd party IP or service providers
- Creating Verification Test Plans
- Defining verification strategy, test bench architecture, stimulus, protocol monitors and checkers
- Experience verifying large System on Chip designs and CPU verification using C
- Experience with DSP, Wireless Communication and networking standards
- Hands on Design Verification experience using Verilog, System Verilog and UVM, and/or VHDL
- Strong verification mindset with a clear understanding of verification goals and practices
- Practical use of scripting languages csh/Tcl/Python/Perl etc
- Good verbal communication and documentation skills and ability to work with diverse teams
- Competitive base salary
- American style share options
- Start-up environment with technical challenges
- UK resident and have UK working rights
- Must be able to work onsite in Edinburgh
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