Hardware Verification and Test Engineering Specialist

23 hours ago


Bristol, Bristol, United Kingdom Weare5vtech Full time
Senior Hardware Verification Engineer

Weare5vtech is an innovative leader in advanced FPGA solutions, seeking a Senior Hardware Verification Engineer to join their cutting-edge methodology team. This role offers the opportunity to shape verification standards, flows, and automation for RTL and Physical Implementation.

This position requires collaboration with RTL design, verification, and physical design engineers to deploy efficient, standardized solutions that elevate hardware engineering productivity.

The ideal candidate will create and refine verification methodologies tailored to address challenges in clock domain crossings (CDC), reset domain crossings (RDC), and power domain crossings (PDC), ensuring optimal performance and reliability of designs.

Key Responsibilities:
  1. Create and refine verification methodologies tailored to address challenges in clock domain crossings (CDC), reset domain crossings (RDC), and power domain crossings (PDC), ensuring optimal performance and reliability of designs.
  2. Apply verification strategies to active FPGA projects, ensuring smooth integration of standardized solutions. Identify and resolve potential issues early in the design process.
  3. Develop and maintain scripts and tools to automate verification processes, reducing manual intervention and improving team efficiency.
  4. Work closely with RTL design engineers to align on architecture and design strategies, and with physical design engineers to ensure design intent is preserved through implementation.
  5. Create comprehensive documentation for verification techniques, workflows, and best practices, and ensure knowledge sharing through regular communication and training sessions.
Required Skills and Experience:
  1. At least 6 years of experience in hardware verification or design.
  2. Strong understanding of power domains, clock domain crossings, clock and reset distribution, power simulation, and optimization.
  3. Hands-on experience with EDA tools like Synopsys, Cadence, or Siemens EDA.
  4. Proficient in hardware verification using Verilog/SystemVerilog.
  5. Programming/scripting skills in Python, C/C++, TCL, or other relevant languages.
Salary and Benefits:

Up to €70,000 salary, with benefits including a hybrid work arrangement of 3 days on-site and 2 days working from home. We offer a competitive compensation package and opportunities for professional growth and development.



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