Low Power Architect
15 hours ago
We are seeking an experienced Semiconductor Design Engineer to join our client's implementation team. The successful candidate will work on developing and verifying power intent for system level designs and SoCs, delivering accurate results across a range of technology nodes, and collaborating with chip design partners to support their physical implementation success.
Key Responsibilities:
- Develop and verify power intent for system level designs and SoCs
- Deliver accurate results across a range of technology nodes to demonstrate the best of our designs
- Collaborate with our chip design partners to support their physical implementation success
- Develop and deploy new methodologies to improve implementation efficiency and results
- Convert ground-breaking R&D concepts into real solutions
Requirements:
- Strong understanding of power management techniques and low-power design methodologies
- Proficiency in writing and verifying UPF (Unified Power Format) to work with industry-standard EDA tools (e.g. Synopsys, Cadence, Siemens)
- Experience with low power design techniques, such as clock and power gating, voltage/frequency scaling, retention
- The ability to analyze problems, reason logically about solutions, and chart the appropriate course to take
- Experience in architecting and embracing new silicon implementation techniques and methodologies
- Be able to dream big, explore novel concepts, and communicate them clearly
- Algorithmic thinking, with well-tested programming ability in Tcl, Make, and Linux shell
Estimated Salary: £90,000 per annum based on industry standards
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