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Principal ASIC Design and Verification Engineer

2 months ago


Oxford, Oxfordshire, United Kingdom Elite People Partners Ltd Full time
Job Description

Elite People Partners Ltd is seeking a Principal ASIC Design and Verification Engineer


We are looking for a highly skilled and experienced Principal ASIC Design and Verification Engineer to join our cutting-edge SoC team in the development of ASICs. The successful candidate will be working with experts in different aspects of SoC development on state-of-the-art projects.


You will have the opportunity to undertake role-specific training to further develop your knowledge, experience, and career development.


The successful candidate will also be working directly for an industry-renowned Senior Director who has built and established many multi-discipline teams throughout their career and their teams have enjoyed major success.


This team is going to be a pure multidiscipline team which can tackle any issue that comes their way and become some of the industry's most well-rounded engineers.


Expected Contributions:
  • Mentoring and guiding engineers and peers
  • Collaborating with senior principal engineers
  • Expert-level understanding of different parts of the design and verification cycle
  • Experience working with leading-edge EDA tools and process nodes using industry-standard languages and methodologies (e.g. SystemVerilog, UVM, Formal)
  • Working on high-volume data centre and enterprise products used by industry-leading companies
  • Experience of working on projects with teams located internationally


Qualifications and Skills:
  • 15-20+ years of digital ASIC design and verification experience
  • Vast experience of:
  • Translating design requirements into RTL
  • Deriving functional requirements for verification
  • SystemVerilog UVM test benches
  • Scripting languages and REST APIs (e.g. Perl/Python/TCL)
  • Team player with good verbal and written communication skills


Desirable Skills:
  • Experience of formal verification (Jasper Gold or VC_Formal)
  • Experience using SV UVM 1800.2
  • Familiarity with C/C++
  • Experience with any of the following storage interfaces: SAS, PCIe, NVMe (preferred) or SATA


Salary and Package:
  • Competitive salaries ranging from £95,000 - £130,000 (depending on level and experience)
  • 10%-20% bonus (based on company and individual performance)
  • 25 days holiday + 8 days bank holiday per year
  • 3 days a week on-site hybrid working
  • Pension (matched group pension up to 8%)
  • Life assurance
  • Income protection
  • Private medical
  • Employee-supported volunteering
  • Employee assistance program for health, wellbeing, financial services, legal services, etc.
  • Training and development
  • Visa sponsorship available
  • Relocation support (if required)


The selection process will consist of a 3-stage process consisting of a 1st stage video call, 2nd stage video call, and a 3rd stage on-site interview (meet the team and site tour). This process can be completed within 2-3 weeks (based on availability).