Electronic Engineering Expert in Formal Methods
5 days ago
Electrical Engineering Expert in Formal Methods
A prestigious EDA company seeks an accomplished Formal Verification Application Engineer to join their Application Engineering team in Cambridge. This exciting opportunity allows the selected candidate to move into a more customer-focused role, working closely with the R&D team and clients.
This position provides a unique chance to develop your Formal Verification expertise and collaborate with a cutting-edge customer. The requirements for this role include:
- Bachelor or Master's degree in Electrical Engineering or a related discipline
- Demonstrated technical expertise in Jasper Gold, OneSpin, or VC Formal
- Familiarity with Verilog, System Verilog, or VHDL
- Participation in several tapeouts at various technology nodes
The estimated annual salary for this position is approximately £65,000-£85,000, contingent upon experience. To learn more about this opportunity, please contact IC Resources.
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