Senior ASIC Design Verification Specialist
3 weeks ago
Job Summary
We are seeking an experienced Principal Verification Engineer to join our team at IC Resources. This is a 6-month fixed contract with a view to go into a permanent position.
About the Role
The Lead Verification Engineer will have expertise in UVM and SystemVerilog to support the development and verification of complex ASIC designs. Responsibilities include developing and implementing verification environments using UVM methodology, creating verification plans and test cases, collaborating with design and architecture teams, performing functional and code coverage analysis, and contributing to verification methodology improvements.
Requirements
- Bachelor's or Master's degree in Electrical Engineering or Computer Science
- 10+ years industry experience
- Proficiency in SystemVerilog and UVM for ASIC verification
- Solid understanding of digital design fundamentals
- Experience with industry-standard simulation and verification tools
- Strong problem-solving skills and attention to detail
- Excellent communication and teamwork abilities
Working Arrangements
This is a Hybrid role requiring regular onsite attendance to either the company's Reading or Bristol office.
Package
The salary range for this role is £70,000 - £80,000 per annum, plus additional benefits.
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