Digital Physical Design Engineer
2 months ago
Job Summary:
Technical Futures Ltd is seeking a highly skilled Digital Physical Design Engineer to join our team. As a STA / Timing Engineer, you will be responsible for ensuring right-first-time high volume silicon production by working closely with the Architecture and RTL team.
Key Responsibilities:
- Develop and validate Timing Constraints for high-volume silicon production
- Sign-off Static Timing Analysis and support for full chip and block level timing closure
- Support IP and chip level integration
- Collaborate with the Architecture and RTL team to ensure successful implementation of RTL to GDS flow
Requirements:
- Bachelor's or Master's Degree in Electronics, Computer Science, or a related field
- 5+ years of experience working in Digital Physical Design role
- Expertise in Timing / SDC constraints generation
- Good knowledge of RTL to GDS implementation flow (synthesis, P&R, LEC, STA)
- Experience with modern semiconductor process technologies (28nm, 22nm, 16nm, 7nm, 3nm)
- Proven scripting skills (Python, shell, or TCL, make)
- Familiarity with EDA tools for design and verification (Cadence Tempus)
What We Offer:
- A highly competitive salary package
- Hybrid working arrangement
- Generous shares
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