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Senior Verification Engineer

2 months ago

Manchester, United Kingdom European Tech Recruit Full time
Job Description

Job Title: Senior Verification Engineer - Systems IP

Job Type: Contract

Location: Remote (Manchester, UK)

About the Role:

We are seeking an experienced Senior Verification Engineer to join our Systems IP team at a world-leading Semiconductor Company. As a key member of our team, you will be responsible for specifying and developing new hardware verification testbenches for future generation hardware IP.

Key Responsibilities:

  • Design Verification: Review and assess proposed design changes from a verification complexity point of view.
  • Verification Environment Ownership: Own the verification environment from investigation all the way to verification closure.
  • Testbench Development: Develop, extend, maintain, and improve the SVA Formal testbenches.
  • Protocol Checker Development: Develop, extend, maintain, and improve the suite of SVA Protocol Checkers for Formal and Simulation use.
  • Methodology Improvement: Identify areas for improvement in processes and methodologies, then implement those changes to advance the best practices and state of the art for hardware verification.
  • Team Collaboration: Close collaboration with other engineering teams leading to high-quality results.

Requirements:

  • Experience: Experience in architecting and implementing formal verification environments for complex IP/module-level designs.
  • Formal Verification: Experience in property-based model-checking or Formal Property verification.
  • Assertion Writing: Practical experience of writing assertions using SystemVerilog Assertions (SVA) with an industry-leading formal tool (e.g. Cadence, Mentor, Synopsys tools).
  • Communication Skills: Ability to quickly understand and apply complex specification details.
  • Teamwork: Strong communication skills and ability to work well as part of a team.
  • Problem-Solving: Dedicated with a focused approach to problem analysis and solving.

Nice to Have:

  • Team Leadership: Team leadership and mentoring experience.
  • Microarchitecture Experience: Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI).