Digital Ic Designer

JOB AD:
Work description
- Derive specifications and define the micro-architecture of the digital sub-blocks
- RTL design of the digital sub-blocks (Verilog/System-Verilog)
- Elaborate detailed verification plan corresponding to the circuit specifications
- Write SDC constraints
- Define block and top-level self-checking test benches RTL and gate level netlist
- Participate to the evaluation of the fabricated ASIC in our measurement lab
- Work in team to successfully design a state-of-the art ASIC
- Participate to design reviews
- Write documentation in accordance with company QA policy

Qualification and Experience
- You have a MSc or PhD in Electrical Engineering or equivalent and 3+ years of hands-on experience in micro-architecture definition, RTL design and verification
- You have a solid background in digital electronic and signal processing
- You have solid knowledge of a digital hardware description languages (VHDL or Verilog) and scripting languages (TCL, Perl, Python)
- You have solid knowledge of System Verilog
- Experience of UVM methodology is a plus
- You demonstrate good analytical and problem-solving skills
- A previous experience in design and verification of digital functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus
- A previous experience with Cadence or Synopsys RTL design flow is a plus
- You are a team player with a critical attitude and sense of initiative
- You communicate fluently in English (oral and written)