Senior Staff Software Verification Engineer

JOB AD:
We are working with a company that offers a dynamic and challenging work environment for experienced professionals. Their employees receive competitive compensation and benefits, and the ability to be an important part of an increasingly larger global team.They are on the leading-edge of the System-on-Chip (SoC) movement, and working with some of the world's largest and most technically advanced customers.

As a Senior Staff Software Verification Engineer, you will have a leading role in the development of next generation of the company's IP solutions, enabling the design of extremely configurable digital logic blocks.

They intend to revolutionize the way to design SoC, and are looking for engineering talents willing to expose themselves to new design and verification methodologies and ready to learn and grow his competences to both digital design verification and softwaredevelopment.

You will create designs and test benches in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. You will go home at the end of the day amazed at all the placeswhere your creations end up.

The position will be ideally staffed in Sophia Antipolis, France, as part of the advanced engineering team. You will join a proven-successful company and be able to shape the future of System on Chip design.

Key Responsibilities:

- Advanced UVM based test bench development and debugging
- Defining, documenting, developing, and executing RTL verification test/coverage at system level
- Performance verification and power-aware verification
- Triaging Regressions, Debugging RTL designs in Verilog and System Verilog
- Help improve and refine verification process, methodology, and metrics
- UVM expertise on complex SoC projects from test bench development to verification closure

Experience Requirements / Qualifications:

- 10+ years of experience in SoC digital design & verification
- Verification flow enhancements using SW programming languages
- Strong RTL (Verilog) and UVM/C test bench debugging skills
- Experience integrating vendor provided VIPs for unit and system level verification
- Excellent problem solving, strong communication and teamwork skills,
- Self-driven, able to work with minimum supervision.

Desired:

- Experience with Arm AMBA protocols
- Experience with digital HW generators, methodology and concept.