Digital Design Verification Engineer
2 weeks ago
At Apple, we work every single day to craft products that enrich people’s lives. Do you like changing the game?We have an opportunity for a results-oriented and highly committed Design Verification Engineer. As a member of our multifaceted group, you will have the unique and exciting opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every day.We are looking for a Design Verification Engineer in our team, who will enable bug-free first silicon for our mixed-signal designs, in close collaboration with Digital and Analog Design engineers.The responsibilities include all phases of pre-silicon verification including, establishing design verification methodology, and test-plan development. Additional responsibilities will include verification environment development, such as stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.
Experience defining coverage space, writing coverage model, analyzing results
Experience with Python, Perl or TCL
Fluency in English is required
Description In this role you will develop verification plans in coordination with design leads and architects.You'll be responsible for building and maintaining verification test bench components and environments.Run simulations and debug design and environment issues.Apply knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog/UVM/OVM/VVM), and logic simulators to verify complex designs.MS/BS in Computer Science or Electrical Engineering or equivalent,
Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants. #
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