Performance And Validation Engineer
2 weeks ago
The hardware team at Hudson River Trading (HRT) creates ultra-low latency products to support our trading on global markets. High performance designs require even higher performance verification. Our ideal candidate is not only an ace tester, but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo.
We are looking for an experienced FPGA verification engineer who is skilled at writing testbenches and building verification environments to exercise complex hardware. FPGA verification is part of an innovative hardware team at HRT which is integral to the success of our trading. You can expect to always be challenged by the ever-changing financial markets as you work on critical hardware and software in an extremely fast-paced, real-time environment.
Responsibilities
Creating testbenches and tests for our FPGA platform, leveraging an open source-based, highly flexible environment
Writing detailed verification plans
Quickly root-cause RTL bugs
Collaborating directly with designers for rapid bringup of new projects and debugging of existing designs
Managing regression and continuous integration infrastructure
Developing and improving open-source and internal tools
Qualifications
Excellent debug and analytical skills
Strong background (4+ years) in RTL functional verification for FPGA or ASIC
Experience with code and functional coverage collection/analysis
Experience with Python
Comfortable in a Linux environment
Familiarity with Verilator and/or Cocotb preferred
Experience with networking protocols preferred
C++ experience is a plus
A bachelor's degree in Computer or Electrical Engineering or a related field
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