Senior Design Engineer

3 weeks ago

Farnborough Hampshire, United Kingdom EpsilonR Full time

Join to apply for the Physical Design Engineer (Backend) role at EpsilonR
Join to apply for the Physical Design Engineer (Backend) role at EpsilonR
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Be part of a dynamic and motivated multi-national Physical Design team, taking part in developing a state of the art Satellite SoC through the full life cycle: design to production. The chips include complex digital and analog modules. You will have access to best in class EDA design tools and will be working in leading edge process technologies.
Physical implementation of complex SoC, VLSI devices and Test Chips, integrating custom designs and 3rd party IP (Hard, Soft, IO, CPUs, DSPs, etc)
Full block level timing closure and manufacturing checks signoff including power planning and analysis
Working alongside the Logic Design RTL team to develop timing constraints for implementation at block and chip level
Jointly with management, build your career development and growth opportunities.
Be part of a dynamic and motivated multi-national Physical Design team, taking part in developing a state of the art Satellite SoC through the full life cycle: design to production. The chips include complex digital and analog modules. You will have access to best in class EDA design tools and will be working in leading edge process technologies.
Physical implementation of complex SoC, VLSI devices and Test Chips, integrating custom designs and 3rd party IP (Hard, Soft, IO, CPUs, DSPs, etc)
Full block level timing closure and manufacturing checks signoff including power planning and analysis
Working alongside the Logic Design RTL team to develop timing constraints for implementation at block and chip level
Jointly with management, build your career development and growth opportunities.
COT/ASIC physical design flow covering: Synthesis, Floorplanning, Place and Route (P&R), Clock Tree Synthesis (CTS), Parasitic Extraction, Static Timing Analysis (STA) and Timing Closure, Physical Verification, Power Analysis, Formal Verification, DFT/DFM and ATPG insertion/pattern generation
Industry standard design processes for deep sub-micron designs
Practical use of scripting languages Tcl/Python/Perl etc
Communicating with other design teams, 3rd party IP and library suppliers and EDA tool vendors to improve scripts and tool flow
Managing/Interfacing to sub-contract design service providers
At least Bachelor of Science in Electrical Engineering, Computer Science, or related field from a major academic institute.

Seniority level Mid-Senior level

Employment type Full-time

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