Senior Verification Engineer
3 weeks ago
Verification Engineering opportunity
A globally prestigious semiconductor company is offering a Verification Engineering opportunity at their HQ in Cambridge, at senior and staff levels of seniority.
Requirements:- 4+ years experience in IP level verification
- Excellent command of System Verilog
- Experience with UVM
- Owning a CPU project and developing it through all stages of the verification process
- Production of verification strategies and test plans
- Determining causality of problems in the verification process
If you would be interested in this role, email your CV to awarner@eu-recruit.com or apply directly via LinkedIn. This role is able to provide visa and relocation support from anywhere in the world.
Key Words: Verification Engineer / Verification / UVM / Semiconductor
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