Senior Validation Engineer
4 weeks ago
Job Description Senior Verification Engineer (UVM)
We are working with a world-leading technology company who are looking to grow their team in Cambridge, UK with experienced Verification Engineers.
This will be a full-time permanent position, offering above market compensation, and where required we can provide relocation and visa support.
Strong knowledge of hardware verification languages (SystemVerilog) along with assembly, C/C++ and scripting.
Exposure to all stages of verification including requirements collection, test plans, testbench implementation, test case development etc.
Fluency in English.
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