NPU System Performance Engineer

4 weeks ago

Cambridge England, United Kingdom Neubla Full time
NPU System Performance Modelling Engineer in Cambridge, UK

Below covers everything you need to know about what this opportunity entails, as well as what is expected from applicants.

About Neubla
As pioneers of innovative neural computing, Neubla is transforming the future of computing by bringing the enormous potential of neural computing to the highest performance in most data-intensive applications. Neubla is made up of people with expertise and lots of experience in many different fields such as AI, semiconductor design, and compilers. At Neubla, you can work in a rapidly changing environment where your new ideas will become innovative products, services, and customer experiences, working with talented colleagues. Neubla offers a competitive package with benefits, including health insurance, a pension scheme, employee wellness support, and a variety of snacks in the office

Summary
We're looking for an exceptional individual with a passion to learn about ground-breaking AI architectures and who is eager to build highly optimised models for performance and functional simulation.
Performance and functional simulation are critical tools for architecture exploration, and it has been used to make many important decisions of various systems. In this highly visible role, you will collaborate closely with multi-site HW and SW teams to investigate and evaluate new micro-architectural ideas and design trade-offs to shape the system features of the next generation AI accelerator by developing, verifying, and using performance models for data-driven architectural exploration and validation.

Job Description
Develop, test, and maintain accurate performance models for system IPs, ranging from a memory subsystem to an interconnect for multiple processing elements or for die-to-die connection
Collaborate with multi-site engineering teams to make data-driven decisions on many of their current engineering issues
Collaborate with hardware design engineers to prune the design space of next generation NPU designs, understanding performance opportunities on current processors and investigate potential micro-architectural enhancement
Collaborate with software engineers to enable various levels of software development at the very early stage
Support hardware design engineers to solve potential performance issues in design verification flows
Develop systems and performance analysis tools necessary for performance correlation and verification workflows

Qualifications
Masters, PhD, or equivalent experience in Computer Engineering, Electrical Engineering, or related field
Knowledge of on-chip bus protocols such as AMBA, coherency flows, interconnects, memory subsystems
Demonstrated ability in system performance modelling, workload analysis, system performance bottleneck debug and analysis
Strong problem solving and analytical skills
Strong programming skills with good understanding of object-oriented languages such as C++/Python
Knowledge of performance or functional modelling of NPUs, CPUs, or GPUs
Excellent collaboration skills
Outstanding written and verbal communications

Preferred Qualifications
Knowledge of Machine Learning concepts and ML hardware accelerators
Prior experience in simulator development
Proficiency in computer/SoC architecture and performance trade-offs
Knowledge of a system modelling/simulation technology, such as SystemC, Gem5, Simics, QEMU and etc
Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging
Familiarity with RISC-V architectures and instruction sets
Knowledge of script languages

The Process
Application review > 1st Interview > 2nd Interview (technical) > 3rd Interview

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