Senior Research Associate
6 days ago
The role
The High-Performance Networks group (HPN), part of the Smart Internet Lab (SIL), is internationally leading and highly influential in the field of End-to-End Network Slicing, Quantum Networking, Hardware Programmable Network Functions, Optical Networks, End-to-End Future Network Orchestration and Optical-Wireless-IT Infrastructure.
We are recruiting a Senior Research Associate/Research Fellow in the Field Programmable Gate Arrays (FPGAs) for networks, AI and machine learning with hardware-based acceleration, FPGA-based security for future telecom networks, and programmable hardware for optical/quantum networks.
You will be offered one of the following salary grades: Senior Research Associate (J); or Research Fellow (K) depending on the skills and experience you bring to the role.
What will you be doing?
The successful candidate will be responsible for contributing to our research projects developing FPGA-based solutions for future network security including dynamical utilisation of quantum key distribution (QKD) and post-quantum cryptography (PQC). The candidate will be expected to develop low-latency encryption and decryption schemes in FPGA compatible with the existing network layering, such as OTNsec, MACsec or IPsec. The candidate will also be expected to develop and orchestrate key management systems, delivering security for the future networks and developing future networking solutions.
With good verbal, writing and communication skills, candidate will work collaboratively with researchers in project teams, the HPN group and Smart Internet Lab, as well as support outreach events in the HPN group. Research activities in HPN include, but are not limited to, these areas: optical networks, quantum networks, AI and machine learning for telecom networks, open radio access networks and 6G networks.
You should apply if
You should apply if you have:
- Experience with software development and experimental work in Digital Design of programmable and high-performance networks.
- Experience with FPGA-based implementation of encryption and decryption algorithms.
- Developed software to interface the programmable hardware and deploy the system in the context of networks.
- Generating ideas, contributing to high-impact journals and presenting at international conferences as well as attending outreach events engaging with a wide range of audiences.
- Good communication and teamwork skills
- Experience in working with project partners and other relevant stakeholders in the context of the research.
Additional information
For informal queries please contact Rui Wang, Email:
To find out more about what it's like to work in the Faculty of Engineering, and how the Faculty supports people to achieve their potential, please see our staff blog:
Interviews are anticipated to be held on 15 July 2024.
Our strategy and mission
We recently launched our strategy to 2030 tying together our mission, vision and values.
The University of Bristol aims to be a place where everyone feels able to be themselves and do their best in an inclusive working environment where all colleagues can thrive and reach their full potential. We want to attract, develop, and retain individuals with different experiences, backgrounds and perspectives – particularly people of colour, LGBT+ and disabled people - because diversity of people and ideas remains integral to our excellence as a global civic institution.
£41,732 to £54,395 per annum, Grade J / Grade K
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